1. Field of the Invention
The present invention relates to a thin film transistor (TFT) liquid crystal display (LCD), and more particularly, to a TFT LCD driver capable of reducing current consumption in a TFT LCD driver for driving a panel of a TFT LCD.
2. Description of the Related Art
Generally, a TFT LCD includes a gate driver for driving TFT gate lines (or row lines) and a source driver for driving TFT source lines (or column lines) in order to drive a TFT LCD panel. The gate driver provides a high voltage to the TFT LCD, and turns on the TFT. The source driver provides source driving signals to each of the source lines in order to indicate a color in the respective source lines, and displays a picture in an LCD. The source and gate drivers include a large number of shift registers in order to sequentially provide signals.
The gate driver for driving a panel of the TFT LCD provides an addressing pulse through a scanning line in order to drive pixels on the gate line, and the source driver provides image signals through a predetermined signal line to activated TFTs. Here, in order to sequentially provide the image signals through each of the signal lines, shift registers are included within the source driver, and input data is sequentially latched in response to an external clock signal.
For example, when a port image signal is processed in a source driver of a 6-bit, 300-channel TFT LCD, shift registers comprising 100 flip-flops are provided in the source driver.
However, since most TFT LCD source drivers are embodied to be used in a portable device such as a laptop computer, reduction in current consumption is a very important issue. The shift registers, which are built-in the source drivers and formed of a plurality of flip-flops, operate in response to a clock signal, so that current consumption in the shift registers is increased with the clock signal being regularly provided. Also, when the panel of the TFT LCD is driven at a high frequency, the time for which the clock signal remains in a xe2x80x9chighxe2x80x9d state or a xe2x80x9clowxe2x80x9d state becomes shorter, so that the clock signal cannot be recognized as an effective clock signal, and a malfunction can occur. Therefore, in order for the flip-flops to recognize a regular xe2x80x9chighxe2x80x9d state or xe2x80x9clowxe2x80x9d state, sufficient buffering must be secured. However, this causes an increase in current consumption. In other words, as the frequency of the clock signal driving the panel of the TFT LCD increases, current consumption of the TFT LCD increases.
To address the above limitations, it is an objective of the present invention to provide a thin film transistor (TFT) liquid crystal device (LCD) driver capable of reducing current consumption by reducing the number of transitions of a clock signal using a double-multiplied signal of an external clock signal as a clock signal.
Accordingly, to achieve the above objective, there is provided a TFT LCD driver comprising a gate driver for driving gate lines of a panel formed of a plurality of transistors and capacitors, and a source driver for driving source lines of the panel. The source driver comprises a shift register portion which includes first through n-th flip-flops, into which a multiplied signal of an external clock signal is input as a clock signal, and input and output terminals of the flip-flops are connected in series and provides a driving pulse signal as an input signal of the first flip-flop in response to the clock signal; a latch clock signal generating portion including first through n-th logic multiplying means for generating first through n-th latch clock signals by logically multiplying the first through n-th middle driving pulse signals generated in the corresponding first through n-th flip-flops by inverted signals of the first through n-th output signals; and a data latching portion for sequentially receiving data signals, and first through n-th latches for latching and outputting the data signals in response to the corresponding first through n-th latch clock signals, respectively.
In particular, the clock signal is input into odd-numbered flip-flops among the first through n-th flip-flops, and inverted signal of the clock signal is input into even-numbered flip-flops among the first through n-th flip-flops. Alternatively, the clock signal is input into even-numbered flip-flops among the first through n-th flip-flops, and the inverted signal of the clock signal is input into odd-numbered flip-flops among the first through n-th flip-flops.
The clock signal is preferably a double-multiplied signal of the external clock signal.